LEPUS‑8

Reference Glossary & Instruction Set
Emulator · Glossary · Sample Programs

Architecture & Registers

The LEPUS-8 is an 8-bit microcomputer with strict domain-specific registers. Operations are routed depending on the mathematical domain:

  • A (Arithmetic Register): Used as the primary accumulator for ADD and SUB.
  • B (Bitwise Register): Used as the primary accumulator for XOR, OR, and AND.
  • C (Shift/Counter Register): Used as the primary accumulator for shifting (SHL, SHR, ASHR) and advanced incrementing.
  • PC (Program Counter): Tracks the memory address of the next instruction.
  • SP (Stack Pointer): Points to the top of the stack (grows upward from 0x58).
  • OUT_REG: A dedicated latch register connected directly to the 7-segment display.

Status Flags

  • ZF (Zero Flag): Set to 1 if the result of an ALU operation, bitwise operation, shift, increment, or decrement results in exactly 0.
  • CF (Carry Flag): Set to 1 if an ADD operation overflows (> 255) or a SUB operation underflows (< 0).

Memory Map (256 Bytes)

Memory is divided into fixed operational zones. Attempting to execute code outside the Program zone will halt the CPU.

RangeZone NameDescription
0x00 - 0x57Program MemoryExecutable code is loaded here.
0x58 - 0x5FHardware StackUsed by PUSH and POP (8 bytes deep).
0x60 - 0x9FScratchpadGeneral purpose RAM for variables.
0xA0 - 0xB7Video BaseGeneral video config (unused in basic renderer).
0xB8 - 0xFFScreen BitmapDirect mapped to the 24x24 pixel grid.

Addressing Modes

  • Immediate: A literal value, e.g., 0x4F or 123.
  • Direct (Memory): Reading/Writing to an address, denoted by brackets, e.g., [0x60].
  • Indirect (Pointer): Reading an address to find another address, denoted by a star, e.g., *[0x60]. Works universally across most instructions!

Instruction Set Reference

Data Movement

MnemonicSyntaxDescription
ILDA / ILDB / ILDCILDA valLoads the literal val into register A, B, or C.
LDA / LDB / LDCLDA [addr]
LDA *[addr]		Loads the value stored at memory [addr] (or the pointer at *[addr]) into register A, B, or C.
WBA / WBBWBA [addr]
WBA *[addr]		Writes the contents of A or B into memory [addr]. If * is used, it treats the value at [addr] as a pointer to the final destination.
LOADLOAD [addr] val
LOAD *[addr] val		Directly stores the literal val into memory [addr] (or pointer *[addr]).
SWPB / SWPC / SWPBCSWPBSwaps the contents of two registers: (A and B), (A and C), or (B and C).

Arithmetic & ALU (Targets A)

MnemonicSyntaxDescription
ADDADD srcAdds src (B, C, [addr], *[addr], or val) to A. Result stored in A. Updates CF and ZF.
SUBSUB srcSubtracts src (B, C, [addr], *[addr], or val) from A. Result stored in A. Updates CF and ZF.
INCINC reg
INC C, src		Increments A, B, or C by 1. Alternatively, increments C by src (val, [addr], or *[addr]). Updates ZF.
DECDEC reg
DEC C, src		Decrements A, B, or C by 1. Alternatively, decrements C by src (val, [addr], or *[addr]). Updates ZF.

Bitwise Logic (Targets B)

MnemonicSyntaxDescription
ANDAND srcBitwise AND between B and src (A, C, [addr], *[addr], or val). Stored in B. Updates ZF.
OROR srcBitwise OR between B and src (A, C, [addr], *[addr], or val). Stored in B. Updates ZF.
XORXOR srcBitwise XOR between B and src (A, C, [addr], *[addr], or val). Stored in B. Updates ZF.

Bit Shifting (Targets C)

MnemonicSyntaxDescription
SHLSHL srcLogical Shift Left on C by src bits (val, [addr], or *[addr]). Updates ZF.
SHRSHR srcLogical Shift Right on C. Zeros are shifted in from the left. Updates ZF.
ASHRASHR srcArithmetic Shift Right on C. The sign bit (MSB) is preserved and shifted in. Updates ZF.

Control Flow & Jumps

MnemonicSyntaxDescription
JMPJMP labelUnconditional jump. Moves the PC to label.
JZJZ labelJump if Zero. Jumps if ZF is 1.
JNZJNZ labelJump if Not Zero. Jumps if ZF is 0.
JCJC labelJump if Carry. Jumps if CF is 1.
JNCJNC labelJump if Not Carry. Jumps if CF is 0.
HLTHLTHalts the CPU. Code execution stops.

Stack & I/O

MnemonicSyntaxDescription
PUSHPUSH srcPushes src (A, B, C, FLAG, [addr], *[addr], or val) to the stack (at SP), then increments SP.
POPPOP destDecrements SP, then pops the top of the stack into dest (A, B, C, [addr], or *[addr]).
OUTOUT regCopies the value of A, B, or C directly to the OUT_REG, displaying it on the 7-segment hex display.
NOPNOPNo Operation. Consumes a clock cycle and moves to the next instruction.